Mobile devices, such as but not limited to personal data appliances, cellular phones, radios, pagers, lap top computers, and the like are required to operate for relatively long periods before being recharged. These mobile devices usually include one or more processors as well as multiple memory modules and other peripheral devices.
In order to reduce the power consumption of mobile devices various power consumption control techniques were suggested. A first technique includes reducing the clock frequency of the mobile device. A second technique is known as dynamic voltage scaling (DVS) or alternatively is known as dynamic voltage and frequency scaling (DVFS) and includes altering the voltage that is supplied to a processor as well as altering the frequency of a clock signal that is provided to the processor in response to the computational load demands (also referred to as throughput) of the processor. Higher voltage levels are associated with higher operating frequencies and higher computational load but are also associated with higher energy consumption. Devices have various components that include peripherals, processors and other components that can operate in few frequencies. DVS can provide at any given point in time a clock signal having a certain frequency out of these few frequencies.
By applying DVS techniques, when the load of a system decreases the voltage/frequency can be decreased thus reducing the power consumption. Nevertheless the reduction of voltage/frequency shall take into account the load fluctuations of the system. For example, if a load decrement is followed by an immediate load increment fast voltage supply fluctuations can amount in a large energy loss due to re-charge of parasitic and/or decoupling capacitors.
Various DVS systems and method are provided at U.S. Pat. No. 6,584,571 of Fung, titled “system and method of computer operating mode clock control for power consumption reduction”, U.S. Pat. No. 6,079,025 of Fung titled “system and method of computer operating mode control for power consumption reduction”, U.S. patent application 20020042887 of Chauvel et al., titled “Dynamic hardware configuration for energy management systems using task attributes”, U.S. patent application 6515530 of titled “Dynamically scalable low voltage clock generation system” of Boerstler et al., all being incorporated herein by reference.
There is a need to provide an efficient manner to decrease and increase voltage/frequency provided to a system.